This page lists all my publications by type and year. By clicking on (BibTex), the full bibitex entry will pop up for you to copy-paste, should you want to cite any of the works.
Journal Articles |
Martino, Raffaele; Cilardo, Alessandro A Flexible Framework for Exploring, Evaluating, and Comparing SHA-2 Designs (Journal Article) IEEE Access, 2019. (BibTeX) @article{martino2019flexible,
title = {A Flexible Framework for Exploring, Evaluating, and Comparing SHA-2 Designs},
author = {Martino, Raffaele and Cilardo, Alessandro},
year = {2019},
date = {2019-01-01},
journal = {IEEE Access},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Flich, Jose; Agosta, Giovanni; Ampletzer, Philipp; Alonso, David Atienza; Brandolese, Carlo; Cappe, Etienne; Cilardo, Alessandro; Dragic, Leon; Dray, Alexandre; Duspara, Alen; others, Exploring manycore architectures for next-generation HPC systems through the MANGO approach (Journal Article) Microprocessors and Microsystems, 61 , pp. 154–170, 2018. (BibTeX) @article{flich2018exploring,
title = {Exploring manycore architectures for next-generation HPC systems through the MANGO approach},
author = {Flich, Jose and Agosta, Giovanni and Ampletzer, Philipp and Alonso, David Atienza and Brandolese, Carlo and Cappe, Etienne and Cilardo, Alessandro and Dragic, Leon and Dray, Alexandre and Duspara, Alen and others},
year = {2018},
date = {2018-01-01},
journal = {Microprocessors and Microsystems},
volume = {61},
pages = {154--170},
publisher = {Elsevier},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Fusella, Edoardo; Cilardo, Alessandro Reducing Power Consumption of Lasers in Photonic NoCs through Application-Specific Mapping (Journal Article) ACM Journal on Emerging Technologies in Computing Systems (JETC), 14 (2), pp. 23, 2018. (BibTeX) @article{fusella2018reducing,
title = {Reducing Power Consumption of Lasers in Photonic NoCs through Application-Specific Mapping},
author = {Fusella, Edoardo and Cilardo, Alessandro},
year = {2018},
date = {2018-01-01},
journal = {ACM Journal on Emerging Technologies in Computing Systems (JETC)},
volume = {14},
number = {2},
pages = {23},
publisher = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Zoni, Davide; Cremona, Luca; Cilardo, Alessandro; Gagliardi, Mirko; Fornaciari, William PowerTap: All-digital power meter modeling for run-time power monitoring (Journal Article) Microprocessors and Microsystems, 63 , pp. 128–139, 2018. (BibTeX) @article{zoni2018powertap,
title = {PowerTap: All-digital power meter modeling for run-time power monitoring},
author = {Zoni, Davide and Cremona, Luca and Cilardo, Alessandro and Gagliardi, Mirko and Fornaciari, William},
year = {2018},
date = {2018-01-01},
journal = {Microprocessors and Microsystems},
volume = {63},
pages = {128--139},
publisher = {Elsevier},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro HtComp: bringing reconfigurable hardware to future high-performance applications (Journal Article) International Journal of High Performance Computing and Networking, 12 (1), pp. 74–83, 2018. (BibTeX) @article{cilardo2018htcomp,
title = {HtComp: bringing reconfigurable hardware to future high-performance applications},
author = {Cilardo, Alessandro},
year = {2018},
date = {2018-01-01},
journal = {International Journal of High Performance Computing and Networking},
volume = {12},
number = {1},
pages = {74--83},
publisher = {Inderscience Publishers (IEL)},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Mazzocca, Nicola; Prinetto, Paolo An abstraction layer enabling pervasive hardware-reconfigurable systems (Journal Article) International Journal of Embedded Systems, 10 (5), pp. 366–377, 2018. (BibTeX) @article{cilardo2018abstraction,
title = {An abstraction layer enabling pervasive hardware-reconfigurable systems},
author = {Cilardo, Alessandro and Mazzocca, Nicola and Prinetto, Paolo},
year = {2018},
date = {2018-01-01},
journal = {International Journal of Embedded Systems},
volume = {10},
number = {5},
pages = {366--377},
publisher = {Inderscience Publishers (IEL)},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Fusella, Edoardo; Cilardo, Alessandro H2ONoC: A Hybrid Optical--Electronic NoC Based on Hybrid Topology (Journal Article) IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25 (1), pp. 330–343, 2017. (BibTeX) @article{fusella2017hybrid,
title = {H2ONoC: A Hybrid Optical--Electronic NoC Based on Hybrid Topology},
author = {Fusella, Edoardo and Cilardo, Alessandro},
year = {2017},
date = {2017-01-01},
journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
volume = {25},
number = {1},
pages = {330--343},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Fusella, Edoardo; Cilardo, Alessandro; Flich, Jose Application-Specific Mapping Optimizations for Photonic Networks-on-Chip (Journal Article) Photonic Interconnects for Computing Systems: Understanding and Pushing Design Challenges, pp. 171, 2017. (BibTeX) @article{fusella2017application,
title = {Application-Specific Mapping Optimizations for Photonic Networks-on-Chip},
author = {Fusella, Edoardo and Cilardo, Alessandro and Flich, Jose},
year = {2017},
date = {2017-01-01},
journal = {Photonic Interconnects for Computing Systems: Understanding and Pushing Design Challenges},
pages = {171},
publisher = {River Publishers},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Fusella, Edoardo; Cilardo, Alessandro Lattice-based turn model for adaptive routing (Journal Article) IEEE Transactions on Parallel and Distributed Systems, 29 (5), pp. 1117–1130, 2017. (BibTeX) @article{fusella2017lattice,
title = {Lattice-based turn model for adaptive routing},
author = {Fusella, Edoardo and Cilardo, Alessandro},
year = {2017},
date = {2017-01-01},
journal = {IEEE Transactions on Parallel and Distributed Systems},
volume = {29},
number = {5},
pages = {1117--1130},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Primativo, Andrea Verification of FPGA-augmented trusted computing mechanisms based on Applied Pi Calculus. (Journal Article) IACR Cryptology ePrint Archive, 2017 , pp. 1246, 2017. (BibTeX) @article{cilardo2017verification,
title = {Verification of FPGA-augmented trusted computing mechanisms based on Applied Pi Calculus.},
author = {Cilardo, Alessandro and Primativo, Andrea},
year = {2017},
date = {2017-01-01},
journal = {IACR Cryptology ePrint Archive},
volume = {2017},
pages = {1246},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Fusella, Edoardo; Cilardo, Alessandro Crosstalk-aware automated mapping for optical networks-on-chip (Journal Article) ACM Transactions on Embedded Computing Systems (TECS), 16 (1), pp. 16, 2016. (BibTeX) @article{fusella2016crosstalk,
title = {Crosstalk-aware automated mapping for optical networks-on-chip},
author = {Fusella, Edoardo and Cilardo, Alessandro},
year = {2016},
date = {2016-01-01},
journal = {ACM Transactions on Embedded Computing Systems (TECS)},
volume = {16},
number = {1},
pages = {16},
publisher = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Fusella, Edoardo; Cilardo, Alessandro Lighting up on-chip communications with photonics: Design tradeoffs for optical NoC architectures (Journal Article) IEEE Circuits and Systems Magazine, 16 (3), pp. 4–14, 2016. (BibTeX) @article{fusella2016lighting,
title = {Lighting up on-chip communications with photonics: Design tradeoffs for optical NoC architectures},
author = {Fusella, Edoardo and Cilardo, Alessandro},
year = {2016},
date = {2016-01-01},
journal = {IEEE Circuits and Systems Magazine},
volume = {16},
number = {3},
pages = {4--14},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Fusella, Edoardo; Cilardo, Alessandro Minimizing power loss in optical networks-on-chip through application-specific mapping (Journal Article) Microprocessors and Microsystems, 43 , pp. 4–13, 2016. (BibTeX) @article{fusella2016minimizing,
title = {Minimizing power loss in optical networks-on-chip through application-specific mapping},
author = {Fusella, Edoardo and Cilardo, Alessandro},
year = {2016},
date = {2016-01-01},
journal = {Microprocessors and Microsystems},
volume = {43},
pages = {4--13},
publisher = {Elsevier},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Fusella, Edoardo Design automation for application-specific on-chip interconnects: A survey (Journal Article) Integration, the VLSI Journal, 52 , pp. 102–121, 2016. (BibTeX) @article{cilardo2016design,
title = {Design automation for application-specific on-chip interconnects: A survey},
author = {Cilardo, Alessandro and Fusella, Edoardo},
year = {2016},
date = {2016-01-01},
journal = {Integration, the VLSI Journal},
volume = {52},
pages = {102--121},
publisher = {Elsevier},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Fusella, Edoardo; Flich, Jose; Cilardo, Alessandro Path setup for hybrid NoC architectures exploiting flooding and standby (Journal Article) IEEE Transactions on Parallel and Distributed Systems, 2016. (BibTeX) @article{fusella2016path,
title = {Path setup for hybrid NoC architectures exploiting flooding and standby},
author = {Fusella, Edoardo and Flich, Jose and Cilardo, Alessandro},
year = {2016},
date = {2016-01-01},
journal = {IEEE Transactions on Parallel and Distributed Systems},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Amelino, Domenico; Barbareschi, Mario; Cilardo, Alessandro An IP Core Remote Anonymous Activation Protocol (Journal Article) IEEE Transactions on Emerging Topics in Computing, 2016. (BibTeX) @article{amelino2016ip,
title = {An IP Core Remote Anonymous Activation Protocol},
author = {Amelino, Domenico and Barbareschi, Mario and Cilardo, Alessandro},
year = {2016},
date = {2016-01-01},
journal = {IEEE Transactions on Emerging Topics in Computing},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro New techniques and tools for application-dependent testing of FPGA-based components (Journal Article) IEEE Transactions on Industrial Informatics, 11 (1), pp. 94–103, 2015. (BibTeX) @article{cilardo2015new,
title = {New techniques and tools for application-dependent testing of FPGA-based components},
author = {Cilardo, Alessandro},
year = {2015},
date = {2015-01-01},
journal = {IEEE Transactions on Industrial Informatics},
volume = {11},
number = {1},
pages = {94--103},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Gallo, Luca Improving multibank memory access parallelism with lattice-based partitioning (Journal Article) ACM Transactions on Architecture and Code Optimization (TACO), 11 (4), pp. 45, 2015. (BibTeX) @article{cilardo2015improving,
title = {Improving multibank memory access parallelism with lattice-based partitioning},
author = {Cilardo, Alessandro and Gallo, Luca},
year = {2015},
date = {2015-01-01},
journal = {ACM Transactions on Architecture and Code Optimization (TACO)},
volume = {11},
number = {4},
pages = {45},
publisher = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Fusella, Edoardo; Gallo, Luca; Mazzeo, Antonino Exploiting concurrency for the automated synthesis of MPSoC interconnects (Journal Article) ACM Transactions on Embedded Computing Systems (TECS), 14 (3), pp. 57, 2015. (BibTeX) @article{cilardo2015exploiting,
title = {Exploiting concurrency for the automated synthesis of MPSoC interconnects},
author = {Cilardo, Alessandro and Fusella, Edoardo and Gallo, Luca and Mazzeo, Antonino},
year = {2015},
date = {2015-01-01},
journal = {ACM Transactions on Embedded Computing Systems (TECS)},
volume = {14},
number = {3},
pages = {57},
publisher = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; De Caro, Davide; Petra, Nicola; Caserta, Francesco; Mazzocca, Nicola; Napoli, Ettore; Strollo, Antonio Giuseppe Maria High speed speculative multipliers based on speculative carry-save tree (Journal Article) IEEE Transactions on Circuits and Systems I: Regular Papers, 61 (12), pp. 3426–3435, 2014. (BibTeX) @article{cilardo2014high,
title = {High speed speculative multipliers based on speculative carry-save tree},
author = {Cilardo, Alessandro and De Caro, Davide and Petra, Nicola and Caserta, Francesco and Mazzocca, Nicola and Napoli, Ettore and Strollo, Antonio Giuseppe Maria},
year = {2014},
date = {2014-01-01},
journal = {IEEE Transactions on Circuits and Systems I: Regular Papers},
volume = {61},
number = {12},
pages = {3426--3435},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Fusella, Edoardo; Gallo, Luca; Mazzeo, Antonino; Mazzocca, Nicola Automated design space exploration for FPGA-based heterogeneous interconnects (Journal Article) Design Automation for Embedded Systems, 18 (3-4), pp. 157–170, 2014. (BibTeX) @article{cilardo2014automated,
title = {Automated design space exploration for FPGA-based heterogeneous interconnects},
author = {Cilardo, Alessandro and Fusella, Edoardo and Gallo, Luca and Mazzeo, Antonino and Mazzocca, Nicola},
year = {2014},
date = {2014-01-01},
journal = {Design Automation for Embedded Systems},
volume = {18},
number = {3-4},
pages = {157--170},
publisher = {Springer US},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Socci, Dario; Mazzocca, Nicola ASP-based optimized mapping in a Simulink-to-MPSoC design flow (Journal Article) Journal of Systems Architecture, 60 (1), pp. 108–118, 2014. (BibTeX) @article{cilardo2014asp,
title = {ASP-based optimized mapping in a Simulink-to-MPSoC design flow},
author = {Cilardo, Alessandro and Socci, Dario and Mazzocca, Nicola},
year = {2014},
date = {2014-01-01},
journal = {Journal of Systems Architecture},
volume = {60},
number = {1},
pages = {108--118},
publisher = {Elsevier},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Barbareschi, Mario; Mazzeo, Antonino Secure distribution infrastructure for hardware digital contents (Journal Article) IET Computers and Digital Techniques, 8 (6), pp. 300–310, 2014. (BibTeX) @article{cilardo2014secure,
title = {Secure distribution infrastructure for hardware digital contents},
author = {Cilardo, Alessandro and Barbareschi, Mario and Mazzeo, Antonino},
year = {2014},
date = {2014-01-01},
journal = {IET Computers and Digital Techniques},
volume = {8},
number = {6},
pages = {300--310},
publisher = {IET Digital Library},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro Modular inversion based on digit-level speculative addition (Journal Article) Electronics Letters, 49 (25), pp. 1609–1610, 2013. (BibTeX) @article{cilardo2013modular,
title = {Modular inversion based on digit-level speculative addition},
author = {Cilardo, Alessandro},
year = {2013},
date = {2013-01-01},
journal = {Electronics Letters},
volume = {49},
number = {25},
pages = {1609--1610},
publisher = {IET},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Gallo, Luca; Mazzocca, Nicola Design space exploration for high-level synthesis of multi-threaded applications (Journal Article) Journal of Systems Architecture, 59 (10), pp. 1171–1183, 2013. (BibTeX) @article{cilardo2013design,
title = {Design space exploration for high-level synthesis of multi-threaded applications},
author = {Cilardo, Alessandro and Gallo, Luca and Mazzocca, Nicola},
year = {2013},
date = {2013-01-01},
journal = {Journal of Systems Architecture},
volume = {59},
number = {10},
pages = {1171--1183},
publisher = {Elsevier},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Mazzocca, Nicola Exploiting vulnerabilities in cryptographic hash functions based on reconfigurable hardware (Journal Article) IEEE Transactions on Information Forensics and Security, 8 (5), pp. 810–820, 2013. (BibTeX) @article{cilardo2013exploiting,
title = {Exploiting vulnerabilities in cryptographic hash functions based on reconfigurable hardware},
author = {Cilardo, Alessandro and Mazzocca, Nicola},
year = {2013},
date = {2013-01-01},
journal = {IEEE Transactions on Information Forensics and Security},
volume = {8},
number = {5},
pages = {810--820},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro Fast Parallel GF(2m) Polynomial Multiplication for All Degrees (Journal Article) IEEE Transactions on Computers, 62 (5), pp. 929–943, 2013. (BibTeX) @article{cilardo2013fast,
title = {Fast Parallel GF(2m) Polynomial Multiplication for All Degrees},
author = {Cilardo, Alessandro},
year = {2013},
date = {2013-01-01},
journal = {IEEE Transactions on Computers},
volume = {62},
number = {5},
pages = {929--943},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro Exploring the potential of threshold logic for cryptography-related operations (Journal Article) IEEE Transactions on Computers, 60 (4), pp. 452–462, 2011. (BibTeX) @article{cilardo2011exploring,
title = {Exploring the potential of threshold logic for cryptography-related operations},
author = {Cilardo, Alessandro},
year = {2011},
date = {2011-01-01},
journal = {IEEE Transactions on Computers},
volume = {60},
number = {4},
pages = {452--462},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro Efficient Bit-Parallel GF(2m) Multiplier for a Large Class of Irreducible Pentanomials (Journal Article) IEEE Transactions on Computers, 58 (7), pp. 1001–1008, 2009. (BibTeX) @article{cilardo2009efficient,
title = {Efficient Bit-Parallel GF(2m) Multiplier for a Large Class of Irreducible Pentanomials},
author = {Cilardo, Alessandro},
year = {2009},
date = {2009-01-01},
journal = {IEEE Transactions on Computers},
volume = {58},
number = {7},
pages = {1001--1008},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Cotroneo, Domenico; di Flora, Cristiano; Mazzeo, Antonino; Romano, Luigi; Russo, Stefano Design and implementation of a high performance architecture for providing digital time stamping services to mobile devices (Journal Article) Computer Systems Science and Engineering, 22 (3), pp. 103, 2007. (BibTeX) @article{cilardo2007design,
title = {Design and implementation of a high performance architecture for providing digital time stamping services to mobile devices},
author = {Cilardo, Alessandro and Cotroneo, Domenico and di Flora, Cristiano and Mazzeo, Antonino and Romano, Luigi and Russo, Stefano},
year = {2007},
date = {2007-01-01},
journal = {Computer Systems Science and Engineering},
volume = {22},
number = {3},
pages = {103},
publisher = {CRL Publishing},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Coppolino, Luigi; Mazzocca, Nicola; Romano, Luigi Elliptic curve cryptography engineering (Journal Article) Proceedings of the IEEE, 94 (2), pp. 395–406, 2006. (BibTeX) @article{cilardo2006elliptic,
title = {Elliptic curve cryptography engineering},
author = {Cilardo, Alessandro and Coppolino, Luigi and Mazzocca, Nicola and Romano, Luigi},
year = {2006},
date = {2006-01-01},
journal = {Proceedings of the IEEE},
volume = {94},
number = {2},
pages = {395--406},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Mazzeo, Antonino; Mazzocca, Nicola Representation of elements in F2m enabling unified field arithmetic for elliptic curve cryptography (Journal Article) Electronics letters, 41 (14), pp. 798–800, 2005. (BibTeX) @article{cilardo2005representation,
title = {Representation of elements in F2m enabling unified field arithmetic for elliptic curve cryptography},
author = {Cilardo, Alessandro and Mazzeo, Antonino and Mazzocca, Nicola},
year = {2005},
date = {2005-01-01},
journal = {Electronics letters},
volume = {41},
number = {14},
pages = {798--800},
publisher = {IET},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Mazzeo, Antonino; Romano, Luigi; Saggese, Giacinto Paolo Exploring the design-space for FPGA-based implementation of RSA (Journal Article) Microprocessors and Microsystems, 28 (4), pp. 183–191, 2004. (BibTeX) @article{cilardo2004exploring,
title = {Exploring the design-space for FPGA-based implementation of RSA},
author = {Cilardo, Alessandro and Mazzeo, Antonino and Romano, Luigi and Saggese, Giacinto Paolo},
year = {2004},
date = {2004-01-01},
journal = {Microprocessors and Microsystems},
volume = {28},
number = {4},
pages = {183--191},
publisher = {Elsevier},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Cilardo, Alessandro; Saggese, Giacinto Paolo; Mazzeo, Antonino; Romano, Luigi A Web Services based Architecture for Digital Time Stamping (Journal Article) Journal of Web Engineering, 2 (3), pp. 148–175, 2004. (BibTeX) @article{cilardo2004aWeb,
title = {A Web Services based Architecture for Digital Time Stamping},
author = {Cilardo, Alessandro and Saggese, Giacinto Paolo and Mazzeo, Antonino and Romano, Luigi},
year = {2004},
date = {2004-01-01},
journal = {Journal of Web Engineering},
volume = {2},
number = {3},
pages = {148--175},
publisher = {Rinton Press},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Inproceedings |
Cilardo, Alessandro; Gagliardi, Mirko; Scotti, Vincenzo Lightweight hardware support for selective coherence in heterogeneous manycore accelerators (Inproceeding) 2019 Design, Automation and Test in Europe Conference and Exhibition (DATE), pp. 932–935, IEEE 2019. (BibTeX) @inproceedings{cilardo2019lightweight,
title = {Lightweight hardware support for selective coherence in heterogeneous manycore accelerators},
author = {Cilardo, Alessandro and Gagliardi, Mirko and Scotti, Vincenzo},
year = {2019},
date = {2019-01-01},
booktitle = {2019 Design, Automation and Test in Europe Conference and Exhibition (DATE)},
pages = {932--935},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Fusella, Edoardo; Cilardo, Alessandro Understanding turn models for adaptive routing: The modular approach (Inproceeding) 2018 Design, Automation and Test in Europe Conference and Exhibition (DATE), pp. 1477–1480, IEEE 2018. (BibTeX) @inproceedings{fusella2018understanding,
title = {Understanding turn models for adaptive routing: The modular approach},
author = {Fusella, Edoardo and Cilardo, Alessandro},
year = {2018},
date = {2018-01-01},
booktitle = {2018 Design, Automation and Test in Europe Conference and Exhibition (DATE)},
pages = {1477--1480},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Gagliardi, Mirko; Fusella, Edoardo; Cilardo, Alessandro Improving Deep Learning with a customizable GPU-like FPGA-based accelerator (Inproceeding) 2018 14th Conference on Ph. D. Research in Microelectronics and Electronics (PRIME), pp. 273–276, IEEE 2018. (BibTeX) @inproceedings{gagliardi2018improving,
title = {Improving Deep Learning with a customizable GPU-like FPGA-based accelerator},
author = {Gagliardi, Mirko and Fusella, Edoardo and Cilardo, Alessandro},
year = {2018},
date = {2018-01-01},
booktitle = {2018 14th Conference on Ph. D. Research in Microelectronics and Electronics (PRIME)},
pages = {273--276},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Fornaciari, William; Agosta, Giovanni; Atienza, David; Brandolese, Carlo; Cammoun, Leila; Cremona, Luca; Cilardo, Alessandro; Farres, Albert; Flich, Jose; Hernandez, Carles; others, Reliable power and time-constraints-aware predictive management of heterogeneous exascale systems (Inproceeding) Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, pp. 187–194, ACM 2018. (BibTeX) @inproceedings{fornaciari2018reliable,
title = {Reliable power and time-constraints-aware predictive management of heterogeneous exascale systems},
author = {Fornaciari, William and Agosta, Giovanni and Atienza, David and Brandolese, Carlo and Cammoun, Leila and Cremona, Luca and Cilardo, Alessandro and Farres, Albert and Flich, Jose and Hernandez, Carles and others},
year = {2018},
date = {2018-01-01},
booktitle = {Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation},
pages = {187--194},
organization = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
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|
Cilardo, Alessandro; Gagliardi, Mirko; Donnarumma, Ciro A Configurable Shared Scratchpad Memory for GPU-like Processors (Inproceeding) Advances on P2P, Parallel, Grid, Cloud and Internet Computing: Proceedings of the 11th International Conference on P2P, Parallel, Grid, Cloud and Internet Computing (3PGCIC--2016), pp. 3–14, Springer International Publishing, 2017. (BibTeX) @inproceedings{cilardo2016configurable,
title = {A Configurable Shared Scratchpad Memory for GPU-like Processors},
author = {Cilardo, Alessandro and Gagliardi, Mirko and Donnarumma, Ciro},
year = {2017},
date = {2017-01-01},
booktitle = {Advances on P2P, Parallel, Grid, Cloud and Internet Computing: Proceedings of the 11th International Conference on P2P, Parallel, Grid, Cloud and Internet Computing (3PGCIC--2016)},
pages = {3--14},
publisher = {Springer International Publishing},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Amelino, Domenico; Barbareschi, Mario; Cilardo, Alessandro A Proposal for the Secure Activation and Licensing of FPGA IP Cores. (Inproceeding) ITASEC, pp. 29–37, 2017. (BibTeX) @inproceedings{amelino2017proposal,
title = {A Proposal for the Secure Activation and Licensing of FPGA IP Cores.},
author = {Amelino, Domenico and Barbareschi, Mario and Cilardo, Alessandro},
year = {2017},
date = {2017-01-01},
booktitle = {ITASEC},
pages = {29--37},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Flich, Jose; Agosta, Giovanni; Ampletzer, Philipp; Alonso, David Atienza; Brandolese, Carlo; Cappe, Etienne; Cilardo, Alessandro; Dragic, Leon; Dray, Alexandre; Duspara, Alen; others, MANGO: Exploring manycore architectures for next-generation HPC systems (Inproceeding) 2017 Euromicro Conference on Digital System Design (DSD), pp. 478–485, IEEE 2017. (BibTeX) @inproceedings{flich2017mango,
title = {MANGO: Exploring manycore architectures for next-generation HPC systems},
author = {Flich, Jose and Agosta, Giovanni and Ampletzer, Philipp and Alonso, David Atienza and Brandolese, Carlo and Cappe, Etienne and Cilardo, Alessandro and Dragic, Leon and Dray, Alexandre and Duspara, Alen and others},
year = {2017},
date = {2017-01-01},
booktitle = {2017 Euromicro Conference on Digital System Design (DSD)},
pages = {478--485},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Gagliardi, Mirko; Passaretti, Daniele NoC-Based Thread Synchronization in a Custom Manycore System (Inproceeding) International Conference on P2P, Parallel, Grid, Cloud and Internet Computing, pp. 673–682, Springer, Cham 2017. (BibTeX) @inproceedings{cilardo2017noc,
title = {NoC-Based Thread Synchronization in a Custom Manycore System},
author = {Cilardo, Alessandro and Gagliardi, Mirko and Passaretti, Daniele},
year = {2017},
date = {2017-01-01},
booktitle = {International Conference on P2P, Parallel, Grid, Cloud and Internet Computing},
pages = {673--682},
organization = {Springer, Cham},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Arcucci, Rossella; Basciano, Davide; Cilardo, Alessandro; D’Amore, Luisa; Mantovani, Filippo Energy Analysis of a 4D Variational Data Assimilation Algorithm and Evaluation on ARM-Based HPC Systems (Inproceeding) International Conference on Parallel Processing and Applied Mathematics, pp. 37–47, Springer, Cham 2017. (BibTeX) @inproceedings{arcucci2017energy,
title = {Energy Analysis of a 4D Variational Data Assimilation Algorithm and Evaluation on ARM-Based HPC Systems},
author = {Arcucci, Rossella and Basciano, Davide and Cilardo, Alessandro and D’Amore, Luisa and Mantovani, Filippo},
year = {2017},
date = {2017-01-01},
booktitle = {International Conference on Parallel Processing and Applied Mathematics},
pages = {37--47},
organization = {Springer, Cham},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Barbareschi, Mario; Cilardo, Alessandro; Mazzeo, Antonino Partial FPGA bitstream encryption enabling hardware DRM in mobile environments (Inproceeding) Proceedings of the ACM International Conference on Computing Frontiers, pp. 443–448, ACM 2016. (BibTeX) @inproceedings{barbareschi2016partial,
title = {Partial FPGA bitstream encryption enabling hardware DRM in mobile environments},
author = {Barbareschi, Mario and Cilardo, Alessandro and Mazzeo, Antonino},
year = {2016},
date = {2016-01-01},
booktitle = {Proceedings of the ACM International Conference on Computing Frontiers},
pages = {443--448},
organization = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Flich, Jose; Agosta, Giovanni; Ampletzer, Philipp; Alonso, David Atienza; Brandolese, Carlo; Cilardo, Alessandro; Fornaciari, William; Hoornenborg, Ynse; Kovac, Mario; Maitre, Bruno; others, Enabling HPC for QoS-sensitive applications: the MANGO approach (Inproceeding) Design, Automation and Test in Europe Conference (DATE), 2016, pp. 702–707, Ieee 2016. (BibTeX) @inproceedings{flich2016enabling,
title = {Enabling HPC for QoS-sensitive applications: the MANGO approach},
author = {Flich, Jose and Agosta, Giovanni and Ampletzer, Philipp and Alonso, David Atienza and Brandolese, Carlo and Cilardo, Alessandro and Fornaciari, William and Hoornenborg, Ynse and Kovac, Mario and Maitre, Bruno and others},
year = {2016},
date = {2016-01-01},
booktitle = {Design, Automation and Test in Europe Conference (DATE), 2016},
pages = {702--707},
organization = {Ieee},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Argenziano, Domenico Securing the cloud with reconfigurable computing: An FPGA accelerator for homomorphic encryption (Inproceeding) Design, Automation and Test in Europe Conference (DATE), 2016, pp. 1622–1627, IEEE 2016. (BibTeX) @inproceedings{cilardo2016securing,
title = {Securing the cloud with reconfigurable computing: An FPGA accelerator for homomorphic encryption},
author = {Cilardo, Alessandro and Argenziano, Domenico},
year = {2016},
date = {2016-01-01},
booktitle = {Design, Automation and Test in Europe Conference (DATE), 2016},
pages = {1622--1627},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Fusella, Edoardo; Cilardo, Alessandro PhoNoCMap: An application mapping tool for photonic networks-on-chip (Inproceeding) Proceedings of the 2016 Conference on Design, Automation and Test in Europe, pp. 289–292, EDA Consortium 2016. (BibTeX) @inproceedings{fusella2016phonocmap,
title = {PhoNoCMap: An application mapping tool for photonic networks-on-chip},
author = {Fusella, Edoardo and Cilardo, Alessandro},
year = {2016},
date = {2016-01-01},
booktitle = {Proceedings of the 2016 Conference on Design, Automation and Test in Europe},
pages = {289--292},
organization = {EDA Consortium},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cinque, Marcello; Cilardo, Alessandro; Cortese, Michele; Corbo, Antonio Hexagon Shield: Enabling Secure Collaboration in Untrusted Environments (Inproceeding) Proc. of the 3rd International Conference in Software Engineering for Defence Applications, 2015. (BibTeX) @inproceedings{cinque2015hexagon,
title = {Hexagon Shield: Enabling Secure Collaboration in Untrusted Environments},
author = {Cinque, Marcello and Cilardo, Alessandro and Cortese, Michele and Corbo, Antonio},
year = {2015},
date = {2015-01-01},
booktitle = {Proc. of the 3rd International Conference in Software Engineering for Defence Applications},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Gallo, Luca Improving Multi-Bank Memory Access Parallelism with Lattice-based Partitioning (Inproceeding) Proc. of the 2015 European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC) conference, 2015. (BibTeX) @inproceedings{cilardo2015Cimproving,
title = {Improving Multi-Bank Memory Access Parallelism with Lattice-based Partitioning},
author = {Cilardo, Alessandro and Gallo, Luca},
year = {2015},
date = {2015-01-01},
booktitle = {Proc. of the 2015 European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC) conference},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro The HtComp research project: an overview (Inproceeding) P2P, Parallel, Grid, Cloud and Internet Computing (3PGCIC), 2015 10th International Conference on, pp. 510–514, IEEE 2015. (BibTeX) @inproceedings{cilardo2015htcomp,
title = {The HtComp research project: an overview},
author = {Cilardo, Alessandro},
year = {2015},
date = {2015-01-01},
booktitle = {P2P, Parallel, Grid, Cloud and Internet Computing (3PGCIC), 2015 10th International Conference on},
pages = {510--514},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Flich, Jose; Agosta, Giovanni; Ampletzer, Philipp; Alonso, David Atienza; Cilardo, Alessandro; Fornaciari, William; Kovac, Mario; Roudet, Fabrice; Zoni, Davide The MANGO FET-HPC project: An overview (Inproceeding) Computational Science and Engineering (CSE), 2015 IEEE 18th International Conference on, pp. 351–354, IEEE 2015. (BibTeX) @inproceedings{flich2015mango,
title = {The MANGO FET-HPC project: An overview},
author = {Flich, Jose and Agosta, Giovanni and Ampletzer, Philipp and Alonso, David Atienza and Cilardo, Alessandro and Fornaciari, William and Kovac, Mario and Roudet, Fabrice and Zoni, Davide},
year = {2015},
date = {2015-01-01},
booktitle = {Computational Science and Engineering (CSE), 2015 IEEE 18th International Conference on},
pages = {351--354},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Fusella, Edoardo; Flich, Jose; Cilardo, Alessandro; Mazzeo, Antonino On the design of a path-setup architecture for exploiting hybrid photonic-electronic NoCs (Inproceeding) Exploiting Silicon Photonics for Energy-Efficient High Performance Computing (SiPhotonics), 2015 Workshop on, pp. 9–16, IEEE 2015. (BibTeX) @inproceedings{fusella2015design,
title = {On the design of a path-setup architecture for exploiting hybrid photonic-electronic NoCs},
author = {Fusella, Edoardo and Flich, Jose and Cilardo, Alessandro and Mazzeo, Antonino},
year = {2015},
date = {2015-01-01},
booktitle = {Exploiting Silicon Photonics for Energy-Efficient High Performance Computing (SiPhotonics), 2015 Workshop on},
pages = {9--16},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Gallo, Luca Interplay of loop unrolling and multidimensional memory partitioning in HLS (Inproceeding) Design, Automation and Test in Europe Conference (DATE), 2015, pp. 163–168, IEEE 2015. (BibTeX) @inproceedings{cilardo2015interplay,
title = {Interplay of loop unrolling and multidimensional memory partitioning in HLS},
author = {Cilardo, Alessandro and Gallo, Luca},
year = {2015},
date = {2015-01-01},
booktitle = {Design, Automation and Test in Europe Conference (DATE), 2015},
pages = {163--168},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Fusella, Edoardo; Cilardo, Alessandro; Mazzeo, Antonino Scheduling-aware interconnect synthesis for FPGA-based Multi-Processor Systems-on-Chip (Inproceeding) Field Programmable Logic and Applications (FPL), 2015 25th International Conference on, pp. 1–2, IEEE 2015. (BibTeX) @inproceedings{fusella2015scheduling,
title = {Scheduling-aware interconnect synthesis for FPGA-based Multi-Processor Systems-on-Chip},
author = {Fusella, Edoardo and Cilardo, Alessandro and Mazzeo, Antonino},
year = {2015},
date = {2015-01-01},
booktitle = {Field Programmable Logic and Applications (FPL), 2015 25th International Conference on},
pages = {1--2},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro Variable-latency signed addition on FPGAs (Inproceeding) Field Programmable Logic and Applications (FPL), 2015 25th International Conference on, pp. 1–6, IEEE 2015. (BibTeX) @inproceedings{cilardo2015variable,
title = {Variable-latency signed addition on FPGAs},
author = {Cilardo, Alessandro},
year = {2015},
date = {2015-01-01},
booktitle = {Field Programmable Logic and Applications (FPL), 2015 25th International Conference on},
pages = {1--6},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Fusella, Edoardo; Cilardo, Alessandro Crosstalk-aware mapping for tile-based optical network-on-chip (Inproceeding) IEEE 12th International Conference on Embedded Software and Systems (ICESS), pp. 1139–1142, IEEE 2015. (BibTeX) @inproceedings{fusella2015crosstalk,
title = {Crosstalk-aware mapping for tile-based optical network-on-chip},
author = {Fusella, Edoardo and Cilardo, Alessandro},
year = {2015},
date = {2015-01-01},
booktitle = {IEEE 12th International Conference on Embedded Software and Systems (ICESS)},
pages = {1139--1142},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Flich, Jose; Gagliardi, Mirko; Gavila, Rafael Customizable heterogeneous acceleration for tomorrow's high-performance computing (Inproceeding) IEEE 12th International Conference on Embedded Software and Systems (ICESS), pp. 1181–1185, IEEE 2015. (BibTeX) @inproceedings{cilardo2015customizable,
title = {Customizable heterogeneous acceleration for tomorrow's high-performance computing},
author = {Cilardo, Alessandro and Flich, Jose and Gagliardi, Mirko and Gavila, Rafael T},
year = {2015},
date = {2015-01-01},
booktitle = {IEEE 12th International Conference on Embedded Software and Systems (ICESS)},
pages = {1181--1185},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Gallo, Luca Generating On-Chip Heterogeneous Systems from High-Level Parallel Code (Inproceeding) Digital System Design (DSD), 2014 17th Euromicro Conference on, pp. 161–168, IEEE 2014. (BibTeX) @inproceedings{cilardo2014generating,
title = {Generating On-Chip Heterogeneous Systems from High-Level Parallel Code},
author = {Cilardo, Alessandro and Gallo, Luca},
year = {2014},
date = {2014-01-01},
booktitle = {Digital System Design (DSD), 2014 17th Euromicro Conference on},
pages = {161--168},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Gallo, Luca; Cilardo, Alessandro; Thomas, David; Bayliss, Samuel; Constantinides, George Area implications of memory partitioning for high-level synthesis on FPGAs (Inproceeding) Field Programmable Logic and Applications (FPL), 2014 24th International Conference on, pp. 1–4, IEEE 2014. (BibTeX) @inproceedings{gallo2014area,
title = {Area implications of memory partitioning for high-level synthesis on FPGAs},
author = {Gallo, Luca and Cilardo, Alessandro and Thomas, David and Bayliss, Samuel and Constantinides, George A},
year = {2014},
date = {2014-01-01},
booktitle = {Field Programmable Logic and Applications (FPL), 2014 24th International Conference on},
pages = {1--4},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Fusella, Edoardo; Gallo, Luca; Mazzeo, Antonino Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems (Inproceeding) Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014, pp. 1–4, IEEE 2014. (BibTeX) @inproceedings{cilardo2014joint,
title = {Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems},
author = {Cilardo, Alessandro and Fusella, Edoardo and Gallo, Luca and Mazzeo, Antonino},
year = {2014},
date = {2014-01-01},
booktitle = {Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014},
pages = {1--4},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Mazzocca, Nicola; Coppolino, Luigi TrustedSIM: Towards Unified Mobile Security (Inproceeding) Ubiquitous Intelligence and Computing, 2013 IEEE 10th International Conference on and 10th International Conference on Autonomic and Trusted Computing (UIC/ATC), pp. 563–568, IEEE 2013. (BibTeX) @inproceedings{cilardo2013trustedsim,
title = {TrustedSIM: Towards Unified Mobile Security},
author = {Cilardo, Alessandro and Mazzocca, Nicola and Coppolino, Luigi},
year = {2013},
date = {2013-01-01},
booktitle = {Ubiquitous Intelligence and Computing, 2013 IEEE 10th International Conference on and 10th International Conference on Autonomic and Trusted Computing (UIC/ATC)},
pages = {563--568},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Mazzocca, Nicola; Prinetto, Paolo Exploring a New Dimension in Code Mobility for Ubiquitous Embedded Systems (Inproceeding) Ubiquitous Intelligence and Computing, 2013 IEEE 10th International Conference on and 10th International Conference on Autonomic and Trusted Computing (UIC/ATC), pp. 56–63, IEEE 2013. (BibTeX) @inproceedings{cilardo2013exploring,
title = {Exploring a New Dimension in Code Mobility for Ubiquitous Embedded Systems},
author = {Cilardo, Alessandro and Mazzocca, Nicola and Prinetto, Paolo},
year = {2013},
date = {2013-01-01},
booktitle = {Ubiquitous Intelligence and Computing, 2013 IEEE 10th International Conference on and 10th International Conference on Autonomic and Trusted Computing (UIC/ATC)},
pages = {56--63},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro Ħeterogeneous Computing vs. Big Đata: The Case of Cryptanalytical Applications (Inproceeding) International Conference on Algorithms and Architectures for Parallel Processing, pp. 177–184, Springer International Publishing 2013. (BibTeX) @inproceedings{cilardo2013heterogeneous,
title = {Ħeterogeneous Computing vs. Big Đata: The Case of Cryptanalytical Applications},
author = {Cilardo, Alessandro},
year = {2013},
date = {2013-01-01},
booktitle = {International Conference on Algorithms and Architectures for Parallel Processing},
pages = {177--184},
organization = {Springer International Publishing},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Fusella, Edoardo; Gallo, Luca; Mazzeo, Antonino Automated synthesis of FPGA-based heterogeneous interconnect topologies (Inproceeding) Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on, pp. 1–8, IEEE 2013. (BibTeX) @inproceedings{cilardo2013automated,
title = {Automated synthesis of FPGA-based heterogeneous interconnect topologies},
author = {Cilardo, Alessandro and Fusella, Edoardo and Gallo, Luca and Mazzeo, Antonino},
year = {2013},
date = {2013-01-01},
booktitle = {Field Programmable Logic and Applications (FPL), 2013 23rd International Conference on},
pages = {1--8},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Gallo, Luca; Mazzeo, Antonino; Mazzocca, Nicola Efficient and scalable OpenMP-based system-level design (Inproceeding) Design, Automation and Test in Europe Conference (DATE), 2013, pp. 988–991, IEEE 2013. (BibTeX) @inproceedings{cilardo2013efficient,
title = {Efficient and scalable OpenMP-based system-level design},
author = {Cilardo, Alessandro and Gallo, Luca and Mazzeo, Antonino and Mazzocca, Nicola},
year = {2013},
date = {2013-01-01},
booktitle = {Design, Automation and Test in Europe Conference (DATE), 2013},
pages = {988--991},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro Exploring the Potential of Hardware Reconfigurability for Cryptanalytic Applications (Inproceeding) DATE 2011 Workshop W2 Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing, 2011. (BibTeX) @inproceedings{cilardo2011WorkshopExploring,
title = {Exploring the Potential of Hardware Reconfigurability for Cryptanalytic Applications},
author = {Cilardo, Alessandro},
year = {2011},
date = {2011-01-01},
booktitle = {DATE 2011 Workshop W2 Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Lofiego, Carmelo; Mazzeo, Antonino; Mazzocca, Nicola Revisiting application-dependent test for FPGA devices (Inproceeding) European Test Symposium (ETS), 2011 16th IEEE, pp. 213–213, IEEE 2011. (BibTeX) @inproceedings{cilardo2011revisiting,
title = {Revisiting application-dependent test for FPGA devices},
author = {Cilardo, Alessandro and Lofiego, Carmelo and Mazzeo, Antonino and Mazzocca, Nicola},
year = {2011},
date = {2011-01-01},
booktitle = {European Test Symposium (ETS), 2011 16th IEEE},
pages = {213--213},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Lofiego, Carmelo; Mazzocca, Nicola An Integrated Environment for Application-Dependent Testing of FPGA Devices (Inproceeding) Proc. of the Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), pp. 287–288, 2011. (BibTeX) @inproceedings{cilardo2011integrated,
title = {An Integrated Environment for Application-Dependent Testing of FPGA Devices},
author = {Cilardo, Alessandro and Lofiego, Carmelo and Mazzocca, Nicola},
year = {2011},
date = {2011-01-01},
booktitle = {Proc. of the Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)},
pages = {287--288},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro The potential of reconfigurable hardware for HPC cryptanalysis of SHA-1 (Inproceeding) Design, Automation and Test in Europe Conference (DATE), 2011, pp. 1–6, IEEE 2011. (BibTeX) @inproceedings{cilardo2011potential,
title = {The potential of reconfigurable hardware for HPC cryptanalysis of SHA-1},
author = {Cilardo, Alessandro},
year = {2011},
date = {2011-01-01},
booktitle = {Design, Automation and Test in Europe Conference (DATE), 2011},
pages = {1--6},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Durante, Paolo; Lofiego, Carmelo; Mazzeo, Antonino Early prediction of hardware complexity in HLL-to-HDL translation (Inproceeding) Field Programmable Logic and Applications (FPL), 2010 International Conference on, pp. 483–488, IEEE 2010. (BibTeX) @inproceedings{cilardo2010early,
title = {Early prediction of hardware complexity in HLL-to-HDL translation},
author = {Cilardo, Alessandro and Durante, Paolo and Lofiego, Carmelo and Mazzeo, Antonino},
year = {2010},
date = {2010-01-01},
booktitle = {Field Programmable Logic and Applications (FPL), 2010 International Conference on},
pages = {483--488},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Esposito, Luigi; Veniero, Antonio; Mazzeo, Antonino; Beltran, Vicenc; Ayguade, Eduard A CellBE-based HPC application for the analysis of vulnerabilities in cryptographic hash functions (Inproceeding) High Performance Computing and Communications (HPCC), 2010 12th IEEE International Conference on, pp. 450–457, IEEE 2010. (BibTeX) @inproceedings{cilardo2010cellbe,
title = {A CellBE-based HPC application for the analysis of vulnerabilities in cryptographic hash functions},
author = {Cilardo, Alessandro and Esposito, Luigi and Veniero, Antonio and Mazzeo, Antonino and Beltran, Vicenc and Ayguade, Eduard},
year = {2010},
date = {2010-01-01},
booktitle = {High Performance Computing and Communications (HPCC), 2010 12th IEEE International Conference on},
pages = {450--457},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro A new speculative addition architecture suitable for two's complement operations (Inproceeding) Proceedings of the Conference on Design, Automation and Test in Europe, pp. 664–669, 2009. (BibTeX) @inproceedings{cilardo2009new,
title = {A new speculative addition architecture suitable for two's complement operations},
author = {Cilardo, Alessandro},
year = {2009},
date = {2009-01-01},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe},
pages = {664--669},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Mazzocca, Nicola; Coppolino, Luigi Virtual scan chains for online testing of FPGA-based embedded systems (Inproceeding) Digital System Design Architectures, Methods and Tools, 2008. DSD'08. 11th EUROMICRO Conference on, pp. 360–366, IEEE 2008. (BibTeX) @inproceedings{cilardo2008virtual,
title = {Virtual scan chains for online testing of FPGA-based embedded systems},
author = {Cilardo, Alessandro and Mazzocca, Nicola and Coppolino, Luigi},
year = {2008},
date = {2008-01-01},
booktitle = {Digital System Design Architectures, Methods and Tools, 2008. DSD'08. 11th EUROMICRO Conference on},
pages = {360--366},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Mazzocca, Nicola Time efficient dual-field unit for cryptography-related processing (Inproceeding) IFIP/IEEE International Conference on Very Large Scale Integration-System on a Chip, pp. 191–210, Springer Berlin Heidelberg 2008. (BibTeX) @inproceedings{cilardo2008time,
title = {Time efficient dual-field unit for cryptography-related processing},
author = {Cilardo, Alessandro and Mazzocca, Nicola},
year = {2008},
date = {2008-01-01},
booktitle = {IFIP/IEEE International Conference on Very Large Scale Integration-System on a Chip},
pages = {191--210},
organization = {Springer Berlin Heidelberg},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Piscitelli, Roberta; Mazzocca, Nicola; Petra, Nicola. Dual-Field Arithmetic Core for High-Performance Cryptographic Operations (Inproceeding) Proceedings of the 2008 VLSI-SoC International Conference, 2008. (BibTeX) @inproceedings{cilardo2008dual,
title = {Dual-Field Arithmetic Core for High-Performance Cryptographic Operations},
author = {Cilardo, Alessandro and Piscitelli, Roberta and Mazzocca, Nicola and Petra, Nicola.},
year = {2008},
date = {2008-01-01},
booktitle = {Proceedings of the 2008 VLSI-SoC International Conference},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Campanile, Ferdinando; Cilardo, Alessandro; Coppolino, Luigi; Romano, Luigi Adaptable parsing of real-time data streams (Inproceeding) Parallel, Distributed and Network-Based Processing, 2007. PDP'07. 15th EUROMICRO International Conference on, pp. 412–418, IEEE 2007. (BibTeX) @inproceedings{campanile2007adaptable,
title = {Adaptable parsing of real-time data streams},
author = {Campanile, Ferdinando and Cilardo, Alessandro and Coppolino, Luigi and Romano, Luigi},
year = {2007},
date = {2007-01-01},
booktitle = {Parallel, Distributed and Network-Based Processing, 2007. PDP'07. 15th EUROMICRO International Conference on},
pages = {412--418},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Coppolino, Luigi; Mazzocca, Nicola A framework for the design of distributed reconfigurable embedded systems (Inproceeding) Architecture of Computing Systems (ARCS), 2007 20th International Conference on, pp. 1–8, VDE 2007. (BibTeX) @inproceedings{cilardo2007framework,
title = {A framework for the design of distributed reconfigurable embedded systems},
author = {Cilardo, Alessandro and Coppolino, Luigi and Mazzocca, Nicola},
year = {2007},
date = {2007-01-01},
booktitle = {Architecture of Computing Systems (ARCS), 2007 20th International Conference on},
pages = {1--8},
organization = {VDE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Coppolino, Luigi; Mazzeo, Antonino; Romano, Luigi Combining programmable hardware and Web Services technologies for delivering high-performance and interoperable security (Inproceeding) Parallel, Distributed and Network-Based Processing, 2007. PDP'07. 15th EUROMICRO International Conference on, pp. 381–386, IEEE 2007. (BibTeX) @inproceedings{cilardo2007combining,
title = {Combining programmable hardware and Web Services technologies for delivering high-performance and interoperable security},
author = {Cilardo, Alessandro and Coppolino, Luigi and Mazzeo, Antonino and Romano, Luigi},
year = {2007},
date = {2007-01-01},
booktitle = {Parallel, Distributed and Network-Based Processing, 2007. PDP'07. 15th EUROMICRO International Conference on},
pages = {381--386},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Coppolino, Luigi; Mazzeo, Antonino; Romano, Luigi Performance evaluation of security services: An experimental approach (Inproceeding) Parallel, Distributed and Network-Based Processing, 2007. PDP'07. 15th EUROMICRO International Conference on, pp. 387–394, IEEE 2007. (BibTeX) @inproceedings{cilardo2007performance,
title = {Performance evaluation of security services: An experimental approach},
author = {Cilardo, Alessandro and Coppolino, Luigi and Mazzeo, Antonino and Romano, Luigi},
year = {2007},
date = {2007-01-01},
booktitle = {Parallel, Distributed and Network-Based Processing, 2007. PDP'07. 15th EUROMICRO International Conference on},
pages = {387--394},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Mazzeo, Antonino; Mazzocca, Nicola; Romano, Luigi A novel unified architecture for public-key cryptography (Inproceeding) Proceedings of the conference on Design, Automation and Test in Europe-Volume 3, pp. 52–57, IEEE Computer Society 2005. (BibTeX) @inproceedings{cilardo2005novel,
title = {A novel unified architecture for public-key cryptography},
author = {Cilardo, Alessandro and Mazzeo, Antonino and Mazzocca, Nicola and Romano, Luigi},
year = {2005},
date = {2005-01-01},
booktitle = {Proceedings of the conference on Design, Automation and Test in Europe-Volume 3},
pages = {52--57},
organization = {IEEE Computer Society},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Coppolino, Luigi; Mazzeo, Antonino; Romano, Luigi High-performance and interoperable security services for mobile environments (Inproceeding) International Conference on High Performance Computing and Communications, pp. 1064–1069, Springer Berlin Heidelberg 2005. (BibTeX) @inproceedings{cilardo2005high,
title = {High-performance and interoperable security services for mobile environments},
author = {Cilardo, Alessandro and Coppolino, Luigi and Mazzeo, Antonino and Romano, Luigi},
year = {2005},
date = {2005-01-01},
booktitle = {International Conference on High Performance Computing and Communications},
pages = {1064--1069},
organization = {Springer Berlin Heidelberg},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Mazzeo, Antonino; Romano, Luigi; Saggese, Giacinto Paolo An FPGA-based key-store for improving the dependability of security services (Inproceeding) Object-Oriented Real-Time Dependable Systems, 2005. WORDS 2005. 10th IEEE International Workshop on, pp. 389–396, IEEE 2005. (BibTeX) @inproceedings{cilardo2005fpga,
title = {An FPGA-based key-store for improving the dependability of security services},
author = {Cilardo, Alessandro and Mazzeo, Antonino and Romano, Luigi and Saggese, Giacinto Paolo},
year = {2005},
date = {2005-01-01},
booktitle = {Object-Oriented Real-Time Dependable Systems, 2005. WORDS 2005. 10th IEEE International Workshop on},
pages = {389--396},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Benso, Alfredo; Cilardo, Alessandro; Mazzocca, Nicola; Miclea, Liviu; Prinetto, Paolo; Szilard, Enyedi Reconfigurable systems self-healing using mobile hardware agents (Inproceeding) Test Conference, 2005. Proceedings. ITC 2005. IEEE International, pp. 1–9, IEEE 2005. (BibTeX) @inproceedings{benso2005reconfigurable,
title = {Reconfigurable systems self-healing using mobile hardware agents},
author = {Benso, Alfredo and Cilardo, Alessandro and Mazzocca, Nicola and Miclea, Liviu and Prinetto, Paolo and Szilard, Enyedi},
year = {2005},
date = {2005-01-01},
booktitle = {Test Conference, 2005. Proceedings. ITC 2005. IEEE International},
pages = {1--9},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Coppolino, Luigi; Mazzeo, Antonino; Romano, Luigi Integrazione nel Sistema Operativo Linux di Politiche Riconfigurabili per il Controllo dell'Accesso ai Dispositivi (Inproceeding) Convegno Annuale AICA 2005, pp. 1–10, 2005. (BibTeX) @inproceedings{cilardo2005integrazione,
title = {Integrazione nel Sistema Operativo Linux di Politiche Riconfigurabili per il Controllo dell'Accesso ai Dispositivi},
author = {Cilardo, Alessandro and Coppolino, Luigi and Mazzeo, Antonino and Romano, Luigi},
year = {2005},
date = {2005-01-01},
booktitle = {Convegno Annuale AICA 2005},
pages = {1--10},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Mazzeo, Antonino; Romano, Luigi; Saggese, Giacinto Paolo Carry-save Montgomery modular exponentiation on reconfigurable hardware (Inproceeding) Proceedings of the conference on Design, automation and test in Europe-Volume 3, pp. 1–6, IEEE Computer Society 2004. (BibTeX) @inproceedings{cilardo2004carry,
title = {Carry-save Montgomery modular exponentiation on reconfigurable hardware},
author = {Cilardo, Alessandro and Mazzeo, Antonino and Romano, Luigi and Saggese, Giacinto Paolo},
year = {2004},
date = {2004-01-01},
booktitle = {Proceedings of the conference on Design, automation and test in Europe-Volume 3},
pages = {1--6},
organization = {IEEE Computer Society},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Coppolino, Luigi; Mazzeo, Antonino; Romano, Luigi Un'architettura Interoperabile per la Fornitura di Servizi di Sicurezza (Inproceeding) Convegno Annuale AICA, pp. 1–8, 2004. (BibTeX) @inproceedings{cilardo2004architettura,
title = {Un'architettura Interoperabile per la Fornitura di Servizi di Sicurezza},
author = {Cilardo, Alessandro and Coppolino, Luigi and Mazzeo, Antonino and Romano, Luigi},
year = {2004},
date = {2004-01-01},
booktitle = {Convegno Annuale AICA},
pages = {1--8},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Saggese, Giacinto Paolo; Mazzeo, Antonino; Romano, Luigi An FPGA-based Implementation of Modular Exponentiation for RSA Cryptosystems (Inproceeding) Convegno Annuale AICA, 2003. (BibTeX) @inproceedings{cilardo2003anFPGA,
title = {An FPGA-based Implementation of Modular Exponentiation for RSA Cryptosystems},
author = {Cilardo, Alessandro and Saggese, Giacinto Paolo and Mazzeo, Antonino and Romano, Luigi},
year = {2003},
date = {2003-01-01},
booktitle = {Convegno Annuale AICA},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Cilardo, Alessandro; Mazzeo, Antonino; Romano, Luigi; Saggese, Giacinto Paolo Gestione dei Profili Utente nell'Erogazione di Servizi Web (Inproceeding) Convegno Annuale AICA, 2003. (BibTeX) @inproceedings{cilardo2003gestione,
title = {Gestione dei Profili Utente nell'Erogazione di Servizi Web},
author = {Cilardo, Alessandro and Mazzeo, Antonino and Romano, Luigi and Saggese, Giacinto Paolo},
year = {2003},
date = {2003-01-01},
booktitle = {Convegno Annuale AICA},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Book Chapters |
Cilardo, Alessandro; Mazzeo, Antonino; Romano, Luigi; Saggese, Giacinto Paolo; Giuseppe, Cattaneo Using Web Services Technology for Inter-enterprise Integration of Digital Time Stamping (Book Chapter) On The Move to Meaningful Internet Systems 2003, LNCS 2889, pp. 960–974, Springer, 2003. (BibTeX) @inbook{cilardo2013using,
title = {Using Web Services Technology for Inter-enterprise Integration of Digital Time Stamping},
author = {Cilardo, Alessandro and Mazzeo, Antonino and Romano, Luigi and Saggese, Giacinto Paolo and Cattaneo Giuseppe},
year = {2003},
date = {2003-01-01},
booktitle = {On The Move to Meaningful Internet Systems 2003, LNCS 2889},
pages = {960--974},
publisher = {Springer},
keywords = {},
pubstate = {published},
tppubtype = {inbook}
}
|
Incollections |
Cilardo, Alessandro; Mazzeo, Antonino; Romano, Luigi; Saggese, Giacinto Paolo Architecture and FPGA Implementation of a Digit-serial RSA Processor (Incollection) New Algorithms, Architectures and Applications for Reconfigurable Computing, pp. 209–218, Springer US, 2005. (BibTeX) @incollection{cilardo2005architecture,
title = {Architecture and FPGA Implementation of a Digit-serial RSA Processor},
author = {Cilardo, Alessandro and Mazzeo, Antonino and Romano, Luigi and Saggese, Giacinto Paolo},
year = {2005},
date = {2005-01-01},
booktitle = {New Algorithms, Architectures and Applications for Reconfigurable Computing},
pages = {209--218},
publisher = {Springer US},
keywords = {},
pubstate = {published},
tppubtype = {incollection}
}
|
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